Avatar Integrated Systems Continues to Tackle Advanced Process Node Design Challenges With New Aprisa release

Significantly better quality of results for cutting-edge designs at 7nm/12 nm

SANTA CLARA, Calif.–(BUSINESS WIRE)–Avatar Integrated Systems, a leader in next-generation physical design solutions, today announced it has added significant new features to its Aprisa™ place and route solution with the recent 19.1 rel.3 version of the product. Avatar introduced Sibling Routing™ and PowerFirst™ technologies in the Aprisa 19.1 release in 2019. Both of these innovative technologies have been designed to address the performance and capacity challenges of place and route at advanced process nodes and the demands for extreme low power and smaller silicon area at mainstream nodes.

Aprisa 19.1 rel.3 demonstrates Avatar’s dedication to helping designers overcome some of the most daunting challenges in IC design today. In addition to the technology advancements to the company’s flagship product Aprisa, Avatar has also been granted three new U.S. patents during Q1 2020. The patents cover techniques that enable place-and-route optimization based on path-based analysis.

“The 19.1 rel.3 is evidence of our continuous technology innovation and leadership in place and route technology and our dedication to helping customers and partners succeed,” said Dr. Ping-San Tzeng, CTO of Avatar Integrated Systems. “This latest release has been demonstrated on several customer advanced process nodes over the past six months, and we will continue to work with our customers to ensure their design success.”

In a recent Deep Chip post, users shared their experiences using Avatar’s advanced place-and-route solutions and commented that the tool is 100% successful at 7 nm.

The following are the highlights of the 19.1. rel.3:

1. Various Aprisa engines and flows have been enhanced for optimal quality of results (QoR) / runtime at 7nm/12nm, including cleaner DRC and timing convergence with improved chip performance and size.
   
2. Engines are improved for better QOR for cutting-edge designs.
   1. Up to 50% better timing for complex logic designs,
   2. Up to 50% better multi-bit clock conversion for reduced total power,
   3. Up to 12% improved scan length with new scan chain engine.
      
3. Up to 20% routing and timing optimization reduction
   
4. New IR optimization features are now available.
   1. New feature to improving IR-drop at advanced nodes,
   2. Improved IR-aware placement engine.

For more information on Aprisa’s 19.1 rel.3 visit www.avatar-da.com or info@avatar-da.com.

About Avatar Integrated Systems

Avatar Integrated Systems is a leading software company in the Electronic Design Automation (EDA) industry focused on Physical Design Implementation. The company’s products enable integrated circuit (IC) designers to create semiconductor chips, which enable today’s electronic devices, such as smartphones, computers, internet equipment, IoT wearables, etc. Avatar’s products are built on the proven technologies acquired from ATopTech, Inc. Avatar Integrated Systems is headquartered in Santa Clara, Calif. with subsidiaries and offices in Taiwan, India, Japan, and Korea. The company continues to serve global customers with cutting-edge digital place-and-route technology and closely partners with customers to reach their design successes. For more information visit: www.avatar-da.com.

Aprisa and Apogee are registered trademarks of Avatar Integrated Systems. Any other trademarks or trade names mentioned are the property of their respective owners.

Contacts

Michelle Clancy, Cayenne Global, michelle.clancy@cayennecom.com
+1-503-702-4732